1. Field of the Invention
The present invention relates to a semiconductor integrated circuit which internally generates voltage lower than externally supplied source voltage to employ the generated internal voltage as operating source voltage, and more particularly, it relates to a semiconductor integrated circuit which can easily increase the burn-in speed.
2. Description of the Prior Art
As an integrated circuit is implemented with higher density of integration, transistors such as insulated gate field effect transistors (IGFET) must be reduced in size. On the other hand, it is necessary to retain the source voltage at 5 V in view of compatibility with TTL (transistor-transistor logic) circuits provided in the exterior of the integrated circuit.
However, when an IGFET in the integrated circuit is reduced in gate length while the source voltage is retained at 5 V, an electric field between drain and source of the IGFET is increased to exceed allowable breakdown voltage between the drain and the source. In order to avoid this, a conventional integrated circuit is adapted to generate voltage lower than externally supplied source voltage in an on-chip manner to employ the lower voltage as operating source voltage.
FIG. 1 shows the structure of a conventional voltage conversion circuit for generating low internal voltage. Referring to FIG. 1, the voltage conversion circuit is formed by a high-resistance resistor 7 having one end connected to a power terminal 4 for supplying external source voltage V.sub.CC and other end connected to a node 8, m (m: positive integer) diode-connected n-channel IGFETs M.sub.l to M.sub.m connected in series between the node 8 and a ground terminal 3 and an n-channel IGFET 6 of high current driving ability having one conductive terminal connected to the power terminal 4, other conductive terminal connected to a power terminal 2 of a main circuit 1 through an internal output terminal 5 and a gate connected to the node 8.
The main circuit 1 has the power terminal 2, a ground terminal 3a, a data input terminal 9 for receiving data from the exterior and a data output terminal 10 for outputting data to the exterior. Although not clearly shown in the figure, the structure of the main circuit 1 is substantially similar to a general semiconductor integrated circuit which is directly driven by externally supplied source voltage V.sub.CC except for that the IGFETs employed therein are reduced in gate length. Description is now made on the operation of the conventional circuit.
Assuming that the resistance value of the high-resistance resistor 7 is set at a value about 100 times the on-resistance of each of the m IGFETs M.sub.l to M.sub.m, voltage V8 at the node 8 is expressed as follows: EQU V8=m.multidot.V.sub.TH ( 1)
where V.sub.TH represents the threshold voltage of each of the IGFETs M.sub.l to M.sub.m When, for example, V.sub.TH =0.5 V and m=8, EQU V8=8.times.0.5=4.0V (2)
The node 8 is connected to the gate of the IGFET 6. Since the IGFET 6 serves as the so-called source follower, the source voltage of the IGFET 6, i.e., the voltage at an internal output terminal 5 is at a level lower by the threshold voltage V.sub.TH than the gate voltage V8.
Thus, voltage V5 at the internal output terminal 5 is as follows: EQU V5=V8-V.sub.TH =4.0-0.5=3.5 V (3)
This voltage V5 is supplied to the main circuit 1 through the power terminal 2 as the source voltage. As obvious from the expression (1), this voltage V5 is independent of the externally supplied source voltage V.sub.CC. Since deviation of .+-.10% is allowed for the external source voltage V.sub.CC, this action is taken simultaneously with voltage conversion to protect the main circuit 1 against bad influence by this variation. Namely, the conventional voltage conversion circuit is adapted to lower the externally supplied source voltage as well as to generate the voltage independent of the external source voltage.
An IGFET is an element which is controlled by voltage applied to a gate electrode on a thin insulation film formed on a channel region between a source and a drain.
Such an insulation film cannot be uniformly provided but is partially thinned in manufacturing of an actual IGFET. Such a thinned portion is deteriorated by long-time application of heat or an electric field and finally broken to cause malfunctioning of the element. In order to remove elements having such a potential defect, the manufacturer of the elements applies stress called dynamic burn-in to forcibly break the potential defective parts, thereby to reject devices having broken IGFETs through another examination.
It is preferable for the manufacturer to perform such dynamic burn-in as quickly as possible in view of productivity. Therefore, stress applying conditions are intensified as compared with normal conditions, to accelerate the burn-in time. For example, the ambient temperature is increased to 125.degree. C. and the external source voltage V.sub.CC is raised to 7 to 8 V to accelerate the applied stress.
However, when an internal source voltage generator is provided in the aforementioned manner, stress acceleration cannot be performed by controlling the external source voltage V.sub.CC since the internal source voltage supplied to the main circuit is constant regardless of the external source voltage.
The aforementioned semiconductor integrated circuit having the on-chip internal source voltage generator is disclosed in "An Experimental 4Mb CMOS DRAM" by Tohru Furuyama et al., 1986 IEEE ISSCC, Digest of Technical Papers, pp. 272-273.
The internal source voltage generator of this prior art is adapted to prevent deviation of threshold voltage of an n-channel MOS-FET caused by hot carriers. However, the same has no circuit for stress acceleration for the case of dynamic burn-in or the like.